1. Field of the Invention
The present invention relates to an apparatus for and a method of evaluating surface irregularity, and more particularly to an apparatus for and a method of evaluating the surface irregularity, wherein the surface of an amorphous silicon film provided with hemispherical grains is monitored in degree of surface irregularity.
The present application claims the priority of Japanese Patent Application No. Heisei 10-037454 filed on Feb. 19, 1998, which is hereby incorporated by reference.
2. Description of the Related Art
In recent years, an integrated circuit of silicon semiconductors, particularly, DRAM (i.e., Dynamic Random Access Memory) shows in general a tendency to higher integration. As the higher integration of the semiconductor circuit reduces an effective area for forming a capacitor, various attempts have been made so as to increase an electrode area by modifying in structure the capacitor.
For example, H. Watanabe et. al have proposed a method for increasing a surface by forming hemispherical grains (i.e., HSG-Si: Hemispherical Grain Silicon) in a surface of an electrode, as disclosed in the following document: xe2x80x9cA new stacked capacitor structure using hemispherical-grain polysilicon electrodexe2x80x9d, 22nd Conference on Solid State Device and Materials p. 873, 1990. A technique for forming the HSG-Si mentioned above is a technique for increasing a surface area by producing geometrical irregularity in a clean surface of a silicon layer through thermal, migration of silicon atoms to such surface.
FIG. 11 is a cross-sectional view of a DRAM, which includes a capacitor provided with a stacked electrode having the HSG-Si formed in its electrode surface. As shown in the same drawing, the DRAM is constructed of: an interlayer insulation film 109 of a device forming substrate 117, formed in which are an insulated-gate field effect transistor, a bit line 108 and a word line 104b; and, a capacitor 118, an interlayer insulation film 114, an aluminum wiring 115 and a cover insulation film 116 all of which are sequentially stacked together in the order of mention. The capacitor 118 is brought into contact with a source/drain diffusion region 105a through a contact hole 110 passing through both the interlayer insulation films 106, 109 of the device forming substrate 117. Incidentally, the device forming substrate 117 is constructed of: an SOI (Semiconductor On Insulator) substrate 101 in which a device forming semiconductor layer 3 is formed on a support substrate 1; a device separating insulation film 102 formed on the SOI substrate 101; a gate insulation film 103 and a gate electrode 104a both disposed above the device forming semiconductor layer 3; a gate (word) wiring 104b disposed, over the device separating insulation film 102; a pair of the source/drain diffusion regions 105a, 105b disposed in opposite sides of the gate electrode. 104a; the interlayer insulation film 106 covering these source/drain diffusion regions 105a, 105b; the bit line 108 brought into contact with the source/drain diffusion regions 105b through the contact hole 107 Of the interlayer insulation film 106; and, the interlayer insulation film 109 disposed on the bit line 108.
The capacitor 118 is constructed by sequentially stacking together a stacked electrode 111 of an amorphous silicon (a-Si) film 4, a capacitance insulation film 112 and a counter electrode (cell-plate electrode) 113 in the order of mention. Formed in the surface of the a-Si film 4 of the stacked electrode 111 are hemispherical grains 5.
In fabricating the capacitor 118 described above, at first, the device forming substrate 117 is produced.
Then, as shown in FIG. 12(b) the contact hole 110 is formed in the interlayer insulation films 106, 109 so as to reach an upper portion of the source/drain diffusion region. 105a. Subsequent to this, the a-Si film 4a which is brought into contact with the source/drain diffusion region 105a through the contact hole 110 is formed using a low pressure CVD process. After that, as shown in FIG., 13(a), the a-Si film 4a is subjected to a pattering process to assume the same shape as that of the stacked electrode 111. Then, the a-Si film 4 thus assuming the same shape as that of the stacked electrode 111 is heated under a reduced pressure, subjected to a Si2H6 gas in this condition, and then subjected to a nitrogen gas. Due to this, as shown in FIG. 13(b), the hemispherical grains 5 are formed in the surface of the a-Si film 4 so that the stacked electrode 111 is produced. Subsequent to this, both the capacitance insulation film 112 and the counter electrode 113 are formed on the stacked electrode 111 so that the capacitor 118 is produced. After that, through the conventional predetermined process steps, the DRAM as shown in FIG. 11 is produced.
In mass-producing the DRAM mentioned above, in order to reproduce a predetermined capacitance value of the capacitor 18, it is very important to evaluate the degree of irregularity of the surface of the a-Si film 4 immediately after the formation of the hemispherical grains 5 in the above surface.
Heretofore, as a method for evaluating the degree of irregularity of the surface, it has been known to measure the capacitance value of the capacitor actually produced by forming both the capacitance insulation film and the counter electrode on the stacked electrode 111 after the formation of the hemspherical grains 5. Further, it has been also known to monitor the irregularity of a surface of a test specimen through reduction in reflectance by measuring the reflectance of white light having been incident on the surface of the test specimen having the irregularity. In a further another conventional method, the degree of irregularity of the surface of the test specimen is evaluated through reduction in reflectance by measuring a secondary X ray with the use of a detector disposed in the side of reflection in a condition in which a monochromatic X ray is incident on the surface of the specimen at an angle of less than a critical angle, and, therefore totally reflected (see Japanese Patent Laid-Open Application No. Hei4-15933). In a still further another conventional method, as shown in FIG. 14(b), a light beam having a wavelength of less than 500 nm is incident on a surface of a test specimen, the surface being provided with irregularity. After that, as shown in FIG. 14(a), the light reflected from the above surface is measured in intensity to evaluate a capacitance value of a capacitor (see Japanese Patent Laid-Open Application No. Hei8-254415).
The conventional method, in which the degree of the irregularity of the surface of the test specimen is evaluated by measuring the capacitance value of the capacitor actually produced, is the most reliable method. However, in such conventional method, it is necessary to form the capacitance insulation film by deposition, and further necessary to form the counter electrode after the formation of the hemispherical grains (i.e., HSG-Si: Hemispherical Grain Silicon). Due to this, patterning of both the counter electrode and an extension for use in measurement is required, which causes the inconvenience of taking too much time and labor. Consequently, the conventional method is not very suitable for monitoring the surface irregularity in mass production.
On the other hand, another one of the conventional methods which uses the white light to measure the reflectance is simple, and, therefore suitable for monitoring the surface irregularity in mass production. However, when such conventional method is used as to the a-Si film, since the light used is visible light, the light passes through the silicon and is reflected at a boundary surface between the a-Si film and a film to produce, a reflected light. This reflected light varies intensity, depending on the optical properties of the material under the a-Si film. In addition to this, the light reflected at the boundary surface may interfere with light reflected at a surface of the a-Si film. Due to this, the reflectance is affected by both the thickness of the a-Si film and variations in optical constants. Due to this, a problem arises in that the conventional methods are poor in accuracy when used to monitor fine irregularity of the surface.
Further, there is another conventional monitoring method which uses the X-ray. In this method, problems arise in that its measuring spot can""t be sufficiently reduced in diameter and that the X-ray radiates to a semiconductor device to excite electrons inside the device, which produces a new electron/hole pair it a channel portion of a transistor disposed under a capacitor, and, therefore impairs the performance of the device. Consequently, it is not adequate to apply this method to a process for manufacturing a product.
There is further another conventional monitoring method. In this method, light with a wavelength of equal to or less than 500 nm not capable of passing through a silicon layer is radiated to have its reflected light monitored. Since this method is not influenced by the thickness of the silicon layer and its substrate, this method is considered to be adequate in application. However, in measuring a test sample on which a pattern as shown in FIG. 14(b) is formed, in case that the pattern is too small in size relative to the radiation light, a transparent film having its portions partially disposed outside the pattern, and, therefore exposed them to the light produces interference components. Due to the presence of these interference components, as shown in FIG. 14(a), the reflected light is widely varies in intensity according to its wavelength. As a result, another problem arises in that this method is poor in measurement accuracy.
Under such circumstances, the present invention was made. Consequently, it is an object of the present invention to provide an apparatus for and a method of evaluating surface irregularity, which is not influenced by material of a specimen, is capable of obtaining a sufficient accuracy in measurement and further capable of preventing a semiconductor device and like elements from deteriorating in performance.
According to a first aspect of the present invention, the above object of the present invention is accomplished by providing
an apparatus for evaluating a surface of a test specimen, comprising:
a plate-like element capable of moving in a condition in which it is brought into contact with the surface of the test specimen, the plate-like element being provided with a contact surface through which it is brought into contact with the surface of the test specimen;
a driving means for imparting a force for moving the test specimen or the plate-like element to the test specimen or to the plate-like element; and
a converter means for detecting a force received by the test specimen or by the plate-like element and for converting the force thus detected into a parameter such as a friction coefficient and like parameters equivalent to the friction coefficient.
According to a second aspect of the present invention,
the converter means is constructed of a piezoelectric element fixedly mounted on the test specimen or on the plate-like element.
According to a third aspect of the present invention, the above object of the present invention is accomplished by providing:
a dropping-fluid means for dropping a fluid on the surface of the test specimen mounted on a specimen table;
a driving means for tilting the specimen table; and
a measurement means for measuring an inclination angle of the specimen table having been tilted.
According to a fourth aspect of the present invention,
the driving means is constructed of a stepping motor; and
the measurement means for measuring the inclination angle of the specimen table is constructed of a means for detecting an angular position of the stepping motor.
According to a fifth aspect of the present invention, the above object of the present invention is accomplished by providing
a method of evaluating a surface of a test specimen, comprising:
evaluating in surface irregularity, particularly in size and in density, the surface of the test specimen by measuring a static friction coefficient or a kinetic friction coefficient in the surface of the test specimen.
According to a sixth aspect of the method of the present invention,
the surface of the test specimen is constructed of a semiconductor film which is provided with hemispherical grains in its surface.
According to a seventh aspect of the present invention,
a plate-like element is mounted on the surface of the test specimen, the plate-like element being provided with a contact surface;
in a condition in which the plate-like element has the contact surface brought into contact with the surface of the test specimen, the test specimen or the plate-like element is moved from rest, so that a force received by the test specimen or by the plate-like element is detected;
whereby a static friction coefficient or a kinetic friction coefficient in the surface of the test specimen is measured.
According to a further aspect of the present invention,
fluid is dropped on the surface of the test specimen;
the test specimen is tilted to measure an inclination angle at which the fluid begins to flows;
whereby a static friction coefficient in the surface of the test specimen is evaluated.
According to a further aspect of the present invention,
a surface area of an electrode of a capacitor formed on a semiconductor substrate or a capacitance value of the capacitor is evaluated by measuring the static friction coefficient or a kinetic friction coefficient in the surface of the test specimen.
According to a further aspect of the present invention,
a static friction coefficient or a kinetic friction coefficient in a surface of a conductive film or of an insulation film each formed on a semiconductor substrate is measured;
whereby the surface of the conductive film or of the insulation film is evaluated in surface irregularity, particularly in size or in density.